The LVDS-Analyzer was developed as part of a test system. With the LVDS-Analyzer, the digital color information of any line within a video image can be recorded and evaluated. In addition, a 2-wire LVDS-Signal from one of four inputs is deserialized and the information contained within is recorded.

The test pattern can be either forwarded 1 on 1 to a reference-display or the own images are issued to test LVDS-Reduction.

  • 5V power supply via the USB port
  • Control and data transfer via USB 2.0
  • Use of diagnostic functions of LVDS-Switch and Deserializer as:

    • Recognition of an LVDS cable error (short-circuit, interruption) on the LVDS output
    • Recognition of an existing connection (lock-signal) in the LVDS Deserializer
    • Use of Pre-Emphasis on the LVDS output and the equalizer on the LVDS input

  • LVDS Switch and Deserializer via USB can be switched on and off during other specific, sensitive testing procedures


  • Deserialization of the LVDS-Data streams with MAX9260 from Maxim Integrated Products Inc.
  • Demapping of the received video data stream into RGB data, HSYNC and VSYNC
  • Analog output of the I²S audio data stream via digital/analog converter
  • Serialized LVDS-Outputs of the video and audio input data stream via MAX9259 by Maxim Integrated Products Inc.
  • Remapping the output data stream for different target devices (displays) is possible.
  • Measurement of the geometry of image acquisition by means of HSYNC, VSYNC and pixel clock
  • Detection of a video line at full resolution up to 2047 pixels
  • RGB color resolution up to 24 Bits
  • Capturing a still image is possible through multiple line scanning
  • Reduction of the resolution to increase the measurement speed is possible


  • User definable test pattern with up to 2047 pixels width and row height; horizontal gray- and color gradients also possible
  • RGB color resolution up to 24bit
  • Mapping of the color and sync signals to the target device (LVDS-Sink)
  • Synchronizable to the sync signals of the input
  • Generating its own sync signals HSYNC, VSYNC and DATA ENABLE from the pixel clock
  • Availability of the pixel clock from the input signal or its own clock generator (18MHz, 27MHz, 29MHz, 36MHz, 54MHz, 58MHz)
Connecting LVDS Input Rosenberger D4S20G-400A5-Z
Connecting LVDS Output Rosenberger D4S20G-400A5-Z
Connecting Analog Audio Output Jack Socket 3,5mm Stereo
Horizontal Resolution 1-16 pixels
Vertical Resolution 1 line
Color Resolution 8:8:8 RGB (24 bit)
Pixel Clock 58 MHz max.
Line Width 1 - 2047 pixel
Detectable Line Line 1 - 2047
Number of Detectable Lines 1 per measurement
Synchronization Input HSYNC, VSYNC positive or negative Logic
Synchronization Output HSYNC, VSYNC, DATA ENABLE
- positive or negative Logic
- Pulse length with 1 pixel resolution or definable or
- receive from input
Pixel Clock Output - Receive from input or
- 18MHz, 27MHz, 29MHz, 36MHz, 54MHz or 58MHz
Current Consumption max. 200 mA

LVDS-Analyzer, USB                     
Order number: 140051

LVDS Switch-Analyzer, USB, RS232
Order number: 118404